ZedBoard: Late Xmas present has arrived!

Finally, after much waiting, my ZedBoard arrived on Tuesday. See it shining in the picture above, isn’t it lovely?

So far I managed only to unbox it and turn it on… Hence only a few notes on the beginnings:

  1. Running Vivado 2013.3 in Fedora Linux: see my previous post.
  2. Running the demo Linux bitstream from the supplied SD card: you need to reconfigure switches, at least JP8, JP9 should be at 3V3 side. Best to see the README on the SD card. The default configuration (JP7-11 at GND) is for JTAG download.
  3. Installing USB-JTAG cable drivers in Linux: surprisingly, all I needed to do was to run Vivado/2013.3/data/xicom/cable_drivers/lin64/digilent/digilent.adept.runtime_2.14.3-x86_64/install.sh as root.
  4. Missing impact tool in Vivado 2013.3: impact is deprecated. Use Hardware Manager / Open Target tabs in Vivado GUI.




  1. hello
    I am master student and i work on the background extraction in the same platform ZC702. I do algorithm for calculation the background in Opencv but i can’t implement it in the FPGA because the library of Opencv is non Synthesizable. are you can give me some procedure or your algorithm for do that?

    Thank you

    • I used Vivado HLS – High Level Synthesis from C. But a C code must be heavily massaged before the HLS will give you any usable results. So it’s not so simple as may seem.
      Regarding OpenCV: the obvious solution is re-implementing algorithm manually in VHDL or Verilog. A good point to start could be a GPU parallel implementations, such as OpenCL or CUDA. There also exist CUDA/OpenCL-to-FPGA compilers, so this could be another venue. But that compilers I have never tried.

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