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  • About the Author
  • Projects
    • 2019 DIY Vacuum Tube Watch EVERGLOW V2.1
    • 2019 DIY Analog Curve Tracer
    • 2014 DIY PIP-Watch
    • 2010 DIY Talking Clock
    • 2013 SMECY (at UTIA)
    • 2012 ADVANCE (at HWU)
    • 2011 Apple-CORE (at UTIA)
  • Blog Posts
0

Did you know: Unaligned accesses in ARM

Posted on September 21, 2016 by Jarda

The X86 has always supported unaligned accesses. In the ARM world the first architecture that supported unaligned accesses in hardware was ARMv6. The architecture was implemented in the ARM11 core around the year 2002 and onward. There is an excellent… Continue Reading →

HigherTech ARM
4

Connecting MCU and FPGA at 100Mbit/s Using Ethernet RMII [Part 2]

Posted on January 23, 2016 by Jarda

This is Part 2 of a two-part series on Ethernet RMII. In Part 1 I described my hardware setup and basic Ethernet operation. In the second and final part I will describe the design of specialized MAC cores I implemented… Continue Reading →

Ethernet, HigherTech, ZED
4

Connecting MCU and FPGA at 100Mbit/s Using Ethernet RMII [Part 1]

Posted on January 19, 2016 by Jarda

This is Part 1 of the two-part series on Ethernet RMII. Part 2 is also available. Imagine your application requires a non-standard periphery controlled by an embedded processor. What options do you have? The periphery can be implemented in an… Continue Reading →

HigherTech, ZED
4

How to: Altium Circuit Maker PCB to OSH-Park

Posted on November 18, 2015 by Jarda

How to export PCB design from the free Altium Circuit Maker v1.0.4 so that it can be submitted to OSH Park fab. This took me an evening to figure out; OSH Park service was bitching about missing “outline” and/or drill… Continue Reading →

CAD
0

[vid] A little ping-pong after the work

Posted on February 14, 2015 by Jarda

   

Displays, Video
1

[Pic] BGA Dead-Bug Style

Posted on January 20, 2015 by Jarda

  [half-way through; click a pic to see hi-res] [connections to bga] [finished “product”] And it (almost) worked! Though not at-speed, because of wire inductances.

HigherTech
0

A Fistful of Radios

Posted on January 5, 2015 by Jarda

During pre-Christmas sale on Seeed Studio Bazaar  they offered these digital radio modules with the nRF24L01+ chip for only US$0.81 each. So I bought 10 of them outright 🙂 What would YOU  suggest to do with them? Build a wireless… Continue Reading →

Uncategorized
9

Error: jtag status contains invalid mode value – communication failure = SOLVED!

Posted on October 22, 2014 by Jarda

This issue bugged me a long time, finally I solved it this evening. Debugging code on my PIP-Watch using my ST-LINK-v2 JTAG debugger was very painful because the debugger software — OpenOCD and GDB — kept failing randomly during debug… Continue Reading →

PIP-Watch
2

Bluetooth Power Modes

Posted on September 29, 2014 by Jarda

In previous post we discussed CPU power consumption in PIP-Watch. Today we look into Bluetooth power consumption because it is significant as much as the CPU power.

Hackaday_2014, PIP-Watch
0

Processor Low-power Optimizations in PIP-Watch

Posted on September 28, 2014 by Jarda

Processor Power The PIP-Watch is a battery-powered device that will be continuously on, hence the average power consumption is one of the most important engineering aspects. In this post I will go through two simple steps of optimizing CPU power… Continue Reading →

Hackaday_2014, PIP-Watch

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  • Initial release of mywayback
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  • Premonitions from 2019
  • Release of my Vacuum Tube Watch “EVERGLOW” v2.1
  • ATtiny’s UPDI interface activates permanently upon noise input!?

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