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5.0
4.0
3.0
2.0
1.0
0.0
4.44
5.00
Vcc
Voh
Vih
3.50
Vt
2.50
1.50
0.50
Vil
Vol
Gnd
0.00
5V CMOS(HCAHCAC)
4.44
5.00
Vcc
Voh
Vih
2.00
Vt
1.50
0.80
0.50
Vil
Vol
Gnd
0.00
5V TTLTTLin / CMOSout(ACT, HCTAHCT)
2.40
5.00
Vcc
Voh
Vih
2.00
Vt
1.50
0.80
0.40
Vil
Vol
Gnd
0.00
5V TTL(STDH, LSHS, ALS)
2.40
3.30
Vcc
Voh
Vih
2.00
Vt
1.50
0.80
0.40
Vil
Vol
Gnd
0.00
3.3VTTL & CMOS(LV,LVTALVTLVC,ALVC)
2.30
2.50
Vcc
Voh
Vih
1.70
Vt
1.20
0.70
0.40
Vil
Vol
Gnd
0.00
2.5VTTL & CMOS
1.35
1.80
Vcc
Voh
Vih
1.17
Vt
0.90
0.63
0.45
Vil
Vol
Gnd
0.00
1.8V CMOS(AVC)
3.00
(5V-tolerant inputs!)
Compa-tibility:
Data source: EETimes, A brief recap of popular logic standards (Mark Pearson, Maxim).